PPS is now implemented and tested. I uploaded to main git repository.
It can be disabled if one wishes, because it uses more LUTs than CPU core. Bootloader is now tuned to S3E eval board, new boards should arrive soon.
GPIO width was increased to maximum of 128 GPIO pins. Unused pins will be removed during synthesis.
Also I changed bootloader from C code to C++ code. This allows for template-based inlined functions for pinMode and digitalWrite, as well as other goodies that C++ can bring.