As you all noticed, Alpha 2 is a bit delayed. This is due to several reasons:
1) I'm integrating a new UART, because current one performs not very well at high bit rates.
2) ADC direct interface took some time, it's stabilizing now.
3) Some more unplanned changes are coming in, like CRC queuing.
4) A faster ZPUino is also on the forge. Some operations are important, and I'd like to merge them in for alpha 2.
5) Documentation is laggin behind because I don't have much spare time lately.
So, stay tuned.