ZPUino extreme (the smallest version of it) successfully implemented and tested on FPGA. This core can do 1-cycle operations on many instructions, hence a lot faster than traditional cores. It also features a separate stack/memory, so memory is now mostly free and available for a DMA engine.
It might need a small redesign however, due to slowness of internal Block RAM. Despite timing things went very good. It still needs interrupt support, but should not be very intrusive.
Álvaro
Tuesday, May 24, 2011
Thursday, May 5, 2011
ZPUino going wishbone
ZPUino is going wishbone, from the CPU core to the IO devices.
This will ease addition of new peripherals, like the ones in opencores.
Álvaro
This will ease addition of new peripherals, like the ones in opencores.
Álvaro
Tuesday, April 26, 2011
Examples section
I just added a new "Examples" section to the website (http://www.alvie.com/zpuino/examples.html).
There's a single demo there for now, which is meant for S3ESK board only.
I'll notify you all when I add some more examples (like the so awaited WAV player).
Álvaro
There's a single demo there for now, which is meant for S3ESK board only.
I'll notify you all when I add some more examples (like the so awaited WAV player).
Álvaro
Monday, April 25, 2011
Alpha 4 is out
ZPUino Alpha 4 is out.
Release Notes
Programmer/bootloader
* Changed the reset method to BREAK + low speed transfer. This hopefully will allow reset even when RS232 signals are noisy.
* Fix bootloader for simulation, was using deprecated methods.
* Small update for new interrupt controller
* Remove unused syscall file for bootloader
Core
* Refactor interrupt controller. New controller uses edge interrupts, and has two external interrupt lines. Also interrupts are now masked by default.
* GPIO: allow disabling PPS on some GPIO pins, such as those who map directly on board devices.
Boards
* Clock speed was being defined as unsigned long long. This might break inline computations, so changed to unsigned long.
* Place memreg[] in lower memory, so it can be used by bootloader/sketch. Interrupts should work perfectly now (and sketches should be slightly smaller)
Papilio One
* Reorganize papilio one directory to hold different FPGA
* New bitfile for Papilio One based on S3E500
Spartan 3E Evaluation Board
* Add some more IO pins to design, to support accessing LCD and rotary encoder.
Full release notes: Release Notes
Download: Download
Release Notes
Programmer/bootloader
* Changed the reset method to BREAK + low speed transfer. This hopefully will allow reset even when RS232 signals are noisy.
* Fix bootloader for simulation, was using deprecated methods.
* Small update for new interrupt controller
* Remove unused syscall file for bootloader
Core
* Refactor interrupt controller. New controller uses edge interrupts, and has two external interrupt lines. Also interrupts are now masked by default.
* GPIO: allow disabling PPS on some GPIO pins, such as those who map directly on board devices.
Boards
* Clock speed was being defined as unsigned long long. This might break inline computations, so changed to unsigned long.
* Place memreg[] in lower memory, so it can be used by bootloader/sketch. Interrupts should work perfectly now (and sketches should be slightly smaller)
Papilio One
* Reorganize papilio one directory to hold different FPGA
* New bitfile for Papilio One based on S3E500
Spartan 3E Evaluation Board
* Add some more IO pins to design, to support accessing LCD and rotary encoder.
Full release notes: Release Notes
Download: Download
Thursday, April 21, 2011
ZPU core comparison
I believe I forgot to share this one: It's a comparison between the older core (zpu_core_small), the current core (ZPUino Premium) and the on-the-forge ZPUino Extreme:
Nice, no ?
ZPUino Extreme also features a completely different architecture, but it's not very suitable for multitasking. But falls perfecly in ZPUino niche.
Alvie
Nice, no ?
ZPUino Extreme also features a completely different architecture, but it's not very suitable for multitasking. But falls perfecly in ZPUino niche.
Alvie
Thursday, April 14, 2011
Request for examples
Can you provide me what you believe would be good examples to include in ZPUino core ?
I've a few I might publish soon:
* Simple AES256 benchmark
* WAV player from SD card
I'll be expecting your comments (or alternatively, send them to zpuino@alvie.com)
Alvie
I've a few I might publish soon:
* Simple AES256 benchmark
* WAV player from SD card
I'll be expecting your comments (or alternatively, send them to zpuino@alvie.com)
Alvie
Wednesday, April 13, 2011
Preparing for Alpha 4
Alpha 4 is on the forge now. I decided to release it as soon as possible, due to eventual problems with programmer (which was not updated on last images, might require you to build your own).
Also a bug related to how compiler handles 64-bit values was fixed: again, it might break some computations, like baud rates, delays, and others.
I don't think win32 port will be ready by then, but other features will make it. The most prominent one is a new interrupt controller, and two external interrupt lines you can use (edge-triggered, high or low level, using PPS). Auto-cleanup of interrupt is also working for the latter, you still need to clear interrupt bits for internal devices for now.
Alvaro
Also a bug related to how compiler handles 64-bit values was fixed: again, it might break some computations, like baud rates, delays, and others.
I don't think win32 port will be ready by then, but other features will make it. The most prominent one is a new interrupt controller, and two external interrupt lines you can use (edge-triggered, high or low level, using PPS). Auto-cleanup of interrupt is also working for the latter, you still need to clear interrupt bits for internal devices for now.
Alvaro
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